• DocumentCode
    3501216
  • Title

    Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching

  • Author

    Kang, C.Y. ; Park, C. ; Park, B.J. ; Min, K.S. ; Yeom, G.Y. ; Kirsch, P.D. ; Jammy, R.

  • Author_Institution
    SEMATECH, Austin, TX, USA
  • fYear
    2011
  • fDate
    25-27 April 2011
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Metal gate/high-k LSTP CMOSFETs for sub-32nm technology was demonstrated using a novel-damage free neutral beam-assisted atomic etching process. Due to its neutralized atomic flux and chemical reaction, it had a high etch selectivity, oxygen concentration control and improved device performance/reliability. NBALE is a key process for reducing GIDL and Ioff control which is a key factor for LSTP.
  • Keywords
    MOSFET; atomic layer deposition; etching; high-k dielectric thin films; GIDL; NBALE; chemical reaction; damage-free high-k removal; high etch selectivity; low standby power; metal gate/high-k LSTP CMOSFET; neutral beam-assisted atomic layer etching; neutralized atomic flux; oxygen concentration control; Dielectrics; Etching; High K dielectric materials; Leakage current; Logic gates; MOSFETs; Metals;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems and Applications (VLSI-TSA), 2011 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-8493-5
  • Type

    conf

  • DOI
    10.1109/VTSA.2011.5872241
  • Filename
    5872241
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3501216