New motion estimation algorithm based on bit-plane matching and its VLSI implementation

Author

Ko, Young-Ki ; Kim, Hyun-Gyu ; Lee, Jong-Wook ; Kim, Young-Ro ; Oh, Hyeong-Cheol ; Ko, Sung-Jea

Author_Institution

Dept. of Electron. Eng., Korea Univ., Seoul, South Korea

Volume

2

fYear

1999

fDate

36495

Firstpage

848

Abstract

In this paper, we present a fast motion estimation algorithm based on bit-plane matching and its hardware implementation. The proposed algorithm performs motion estimation using 1-bit planes that are extracted from a video sequence. The proposed algorithm can be realized using only simple Boolean functions and makes a cheaper and faster implementation possible, while maintaining the accuracy of motion estimation. The proposed motion estimator has been implemented in FPGA and operates fast enough to handle real time video applications such as H.261/263 and MPEG-1/2

Keywords

Boolean functions; VLSI; field programmable gate arrays; image matching; image sequences; motion estimation; video signal processing; Boolean function; FPGA; H.261/263; MPEG-1/2; VLSI hardware; bit-plane matching; motion estimation algorithm; video sequence; Boolean functions; Clocks; Field programmable gate arrays; Hardware; Motion estimation; Process design; Prototypes; Very large scale integration; Video compression; Video sequences;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON 99. Proceedings of the IEEE Region 10 Conference

Conference_Location

Cheju Island

Print_ISBN

0-7803-5739-6

Type

conf

DOI

10.1109/TENCON.1999.818551

Filename

818551