Dual-mode low-power bus encoding for high-performance bus drivers

System-level buses consume much more power by orders of magnitude than on-chip buses. Existing bus encoding schemes are based on rail-to-rail CMOS bus drivers while recent high-performance devices include BiCMOS bus drivers to achieve transfer bandwidth required. BiCMOS drivers consume significant quiescent power as well as active power proportional to the bus frequency. This paper introduces a precise power consumption model for BiCMOS drivers with source-termination resistors. Dual-mode bus encoding scheme is suggested as well for variable bus frequencies for power management