Design considerations of sampled analog equalizer for hard-disk read channel

Author

Choi, Jungryoul ; Choi, Joongho

Author_Institution

Dept. of Electr. Eng., Seoul Univ., South Korea

Volume

2

fYear

1999

fDate

36495

Firstpage

1347

Abstract

The partial-response maximum likelihood (PRML) method requires efficient equalization in order to obtain the desired patterns of ISI before the signal processing of Viterbi decoding is applied. The sampled analog system is the most efficient way to implement the partial response algorithm and it has been mainly implemented by an analog FIR filter. In this paper, various design considerations-gain error offset, system resolution, and the jitter problem for the equalizer-are presented to incorporate the sampled analog system. Finally, the modified phase detector algorithm for a sampled analog equalizer is proposed

Keywords

FIR filters; Viterbi decoding; analogue processing circuits; digital-analogue conversion; equalisers; hard discs; jitter; partial response channels; phase detectors; sampled data circuits; DAC; ISI; PRML method; Viterbi decoding; analog FIR filter; gain error offset; hard-disk read channel; jitter; modified phase detector algorithm; partial response algorithm; partial-response maximum likelihood method; sampled analog equalizer; sampled analog system; sampled and hold amplifier; signal processing; storage capacity; system resolution; Equalizers; Finite impulse response filter; Intersymbol interference; Jitter; Maximum likelihood decoding; Maximum likelihood detection; Phase detection; Signal processing algorithms; Signal resolution; Viterbi algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON 99. Proceedings of the IEEE Region 10 Conference

Conference_Location

Cheju Island

Print_ISBN

0-7803-5739-6

Type

conf

DOI

10.1109/TENCON.1999.818679

Filename

818679