DocumentCode :
3506566
Title :
Dimension optimization of through silicon via(TSV) through simulation and design of experiment (DOE)
Author :
Xiang Gao ; Run Chen ; Cao Li ; Sheng Liu
Author_Institution :
State Key Lab. for Digital Manuf. Equip. & Technol., Huazhong Univ. of Sci. & Technol., Wuhan, China
fYear :
2012
fDate :
13-16 Aug. 2012
Firstpage :
1185
Lastpage :
1189
Abstract :
As the market is desperate for better performed, miniaturized, highreliableand lower-priced electronic devices, nowadays, three dimensional integrated circuit (3D IC) seems to be a promising technology which can meet these requirements. However, many issues hinder this technology from being developedrapidly, among which the reliability of through silicon via(TSV) is one of the major concerns. Because of its complexity of the architecture and miniaturized interconnect, TSVs often undergo relatively high density electric current, which inevitably generates a fair amount of heat during work. What´s more, the coefficient of thermal expansion (CTE) mismatch between copper and silicon, thereforestress concentration can easily take place between them, resulting in shorter fatigue life of the device. Since design parameters can have a great effect on these devices´ reliability, optimizing these parameters is essential and meaningful. This paper is meant to present the impact of some design parameters such as TSV diameter and pitch, thickness of silicon dioxide (SiO2), die thickness, solder diameter and underfill properties on the thermo-mechanical durability of TSVs and direct chip attach (DCA) solder joints respectively using the design of experiments (DoE) which applies Taguchi experiments and analysis method because of its high efficiency and effectiveness. The two dimensional models are built in numerical experiments under accelerated thermal cycle loading. In the model, solder is assumed to be visco-plastic material and copper interconnects are considered to have elastic-plastic behavior. Two continuum damage models, Coffin-Manson and creep energy damage modelare used to assess the number of cycles before TSVs and solder joints fail to work under thermal cycle loading respectively. The results are analyzed by Minitab to decide the variation tendency of TSVs´ and solder joints´ fatigue life, which is induced by the parameters with different levels, and general line- r model analysis of variance is used to assess significance of each factor in determining durability of TSV interconnects and solder joints. The results reveal that the most influential factor on TSV durability is TSV diameter, while for durability of the solder joints, it is the property of underfill. TSV durability increases as the TSV diameter decreases and solder joints have a longer fatigue life when underfill has a smaller Young´s Modulus.
Keywords :
Taguchi methods; Young´s modulus; copper; creep; design of experiments; durability; elastoplasticity; electronic engineering computing; fatigue; silicon; solders; thermal expansion; three-dimensional integrated circuits; viscoplasticity; Coffin-Manson damage; DCA solder joints; TSV diameter; TSV durability; TSV pitch; Taguchi experiment; Young´s modulus; analysis of variance; continuum damage model; copper interconnects; creep energy damage; die thickness; direct chip attach; elastic-plastic behavior; silicon dioxide; solder diameter; thermal cycle loading; thermo-mechanical durability; underfill property; visco-plastic material; Abstracts; Copper; Lead; Levee; Materials; Reliability; Through-silicon vias; DoE; Reliability; TSV;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2012 13th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4673-1682-8
Electronic_ISBN :
978-1-4673-1680-4
Type :
conf
DOI :
10.1109/ICEPT-HDP.2012.6474819
Filename :
6474819
Link To Document :
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