DocumentCode
3508012
Title
IPP Watermarking Technique for IP Core Protection on FPL Devices
Author
Castillo, Encarnacion ; Parrilla, Luis ; García, Antonio ; Loris, Antonio ; Meyer-Baese, Uwe
Author_Institution
Granada Univ., Granada
fYear
2006
fDate
28-30 Aug. 2006
Firstpage
1
Lastpage
6
Abstract
This paper presents a technique for intellectual property protection (IPP) of systems to be implemented over programmable devices. The aim is to protect the author rights of reusable IP cores by means of a digital signature that uniquely identifies both the original design and the design recipient. The technique relies on a procedure that spreads a digital signature in cells of look-up tables of designs at HDL design level, not increasing the area of the system. The technique includes a procedure for signature extraction requiring minimal modifications to the system. So it is possible to detect the ownership rights without interfering the normal operation of the system. The IPP technique has been implemented on FPL devices, not disrupting the functionality neither significantly degrading the performance.
Keywords
copyright; digital signatures; field programmable gate arrays; hardware description languages; table lookup; watermarking; FPL devices; HDL design level; IPP watermarking technique; digital signature extraction; field-programmable logic; hardware description languages; intellectual property protection; look-up table cell; ownership rights detection; Copyright protection; Degradation; Design methodology; Digital signatures; Field programmable gate arrays; Hardware design languages; Intellectual property; Logic; Timing; Watermarking;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location
Madrid
Print_ISBN
1-4244-0312-X
Type
conf
DOI
10.1109/FPL.2006.311256
Filename
4101018
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