Title :
Optimal Simultaneous Scheduling, Binding and Routing for Processor-Like Reconfigurable Architectures
Author :
Brenner, J.A. ; van der Veen, J.C. ; Fekete, S.P. ; Filho, J. Oliveira ; Rosenstiel, W.
Author_Institution :
Dept. for Math. Optimization, Braunschweig Univ. of Technol.
Abstract :
We discuss the problem of simultaneously scheduling, binding and routing a given data flow graph to a coarse-grain architecture consisting of identical processing elements (PEs) that are connected by a nearest-neighbour mesh-like interconnection network. While there are heuristics trying to solve this problem, we develop the first exact method based on integer linear programming. This allows us to achieve provably optimal solutions for two different objective functions, for small to medium instances. In addition, we describe a heuristic that seems to outperform all other known heuristics
Keywords :
data flow graphs; integer programming; linear programming; processor scheduling; reconfigurable architectures; data flow graph; integer linear programming; interconnection network; processing elements; reconfigurable architectures; Bandwidth; Clocks; Computer architecture; Cyclic redundancy check; Integer linear programming; Iron; Job shop scheduling; Processor scheduling; Reconfigurable architectures; Routing;
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
DOI :
10.1109/FPL.2006.311262
