DocumentCode
3508229
Title
LDMOS transistor for SMART POWER circuits: modeling and design
Author
Moncoqut, D. ; Farenc, D. ; Rossel, P. ; Charitat, G. ; Tranduc, H. ; Victory, J. ; Pages, I.
Author_Institution
Lab. d´´Anal. et d´´Archit. des Syst., Toulouse, France
fYear
1996
fDate
29 Sep-1 Oct 1996
Firstpage
216
Lastpage
219
Abstract
This paper presents a compact model for circuit simulation. Physical properties and layout of the lateral MOSFET structure are considered. The model features a simple but accurate formulation of the drift resistance and the interelectrode capacitances. Experimental data characteristics are compared with simulated ones and very good agreement is found
Keywords
capacitance; circuit analysis computing; equivalent circuits; integrated circuit design; integrated circuit modelling; power MOSFET; power integrated circuits; semiconductor device models; LDMOS transistor; PSPICE model implementation; circuit simulation; compact model; device modeling; drift resistance; interelectrode capacitances; lateral DMOSFET; lateral MOSFET structure; smart power circuits; Analytical models; Capacitance; Circuit simulation; Intrusion detection; Logic circuits; MOSFET circuits; Medium voltage; Power integrated circuits; Power system modeling; Switching frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, 1996., Proceedings of the 1996
Conference_Location
Minneapolis, MN
ISSN
1088-9299
Print_ISBN
0-7803-3516-3
Type
conf
DOI
10.1109/BIPOL.1996.554651
Filename
554651
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