DocumentCode :
3508257
Title :
A Context Dependent Clock Control Mechanism for Dynamically Reconfigurable Processors
Author :
Amano, H. ; Hasegawa, Y. ; Abe, S. ; Ishikawa, K. ; Tsutsumi, S. ; Kurotaki, S. ; Nakamura, T. ; Nishimura, T.
Author_Institution :
Dept. of Inf. & Comput. Sci., Keio Univ.
fYear :
2006
fDate :
28-30 Aug. 2006
Firstpage :
1
Lastpage :
6
Abstract :
Dynamically reconfigurable processors improve the area-efficiency by executing a task with multiple hardware contexts. The maximum operational frequency is limited with a context which has the largest delay time, and it causes a certain overhead when each context has various delay time. A context dependent dynamic clock control method, which changes the clock so as to fit the current operational context, is proposed for NEC electronics´ DRP-1. A clock generator consisting of a preset-able counter associated with the state transition table for controlling the context switching is proposed. Performance evaluation using several applications reveals that the proposed method improves the performance from 10% to 110% with a small increasing of the power consumption
Keywords :
clocks; microcomputers; performance evaluation; reconfigurable architectures; context dependent clock control mechanism; context switching; current operational context; delay time; dynamically reconfigurable processors; maximum operational frequency; multiple hardware contexts; performance evaluation; power consumption; Clocks; Costs; Counting circuits; Delay effects; Frequency; Hardware; Intelligent networks; National electric code; Parallel processing; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
Type :
conf
DOI :
10.1109/FPL.2006.311269
Filename :
4101031
Link To Document :
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