Design of a programmable digital IIR filter based on FPGA

FPGAs are increasingly being promoted in signal processing applications with their tractability, parallelism, high speed, and fast time-to-market. Digital filter is one of the important contents of digital signal process. The characteristic of frequency selection in lower order in comparison with FIR, IIR digital filter is widely applied in modern signal processing systems. Hardware description languages such as Verilog differ from software programming languages because their include ways of describing the propagation of time and signal dependencies (sensitivity). In this paper, architecture of a programmable digital IIR filter has been proposed based XILINX FPGA board. In this architecture gate level design has been used to analyze the impulse response of the IIR filter.