DocumentCode
3510432
Title
RF interconnect for multi-Gbit/sec board-level clock distribution
Author
Ryu, Woonghwan ; Kim, Hyungsoo ; Ahn, Seungyoung ; Kim, Namhoon ; Choi, Baekkyu ; Kim, Joungho
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
fYear
1999
fDate
1999
Firstpage
33
Lastpage
36
Abstract
We newly propose a multi-Gbit/sec clock distribution scheme to achieve minimized skew and jitter using RF interconnects. The proposed RF clock distribution scheme has successfully demonstrated less than 22 ps skew and less than 3 ps jitter at 2 GHz
Keywords
UHF circuits; clocks; integrated circuit interconnections; integrated circuit packaging; printed circuits; timing jitter; 2 GHz; 22 ps; 3 ps; RF clock distribution scheme; RF interconnect; board-level clock distribution; clock distribution scheme; jitter; jitter minimization; skew; skew minimization; Clocks; High speed optical techniques; Integrated circuit interconnections; Jitter; Optical attenuators; Optical crosstalk; Optical interconnections; Optical receivers; Optical transmitters; Radio frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 1999
Conference_Location
San Diego, CA
Print_ISBN
0-7803-5597-0
Type
conf
DOI
10.1109/EPEP.1999.819188
Filename
819188
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