Title :
Design and performance evaluation of chip capacitors on microprocessor packaging
Author :
Yew, Teong-Guan ; Li, Yuan-Liang ; Chung, Chee-Yee ; Figueroa, David G.
Author_Institution :
Intel Corp., Chandler, AZ, USA
Abstract :
This paper describes the different chip capacitor placement design on Intel´s latest Celeron CPU package. The evaluation of its effectiveness in the power delivery network and final impact on CPU performance are also discussed
Keywords :
capacitors; driver circuits; integrated circuit design; integrated circuit packaging; microprocessor chips; CPU performance; Intel Celeron CPU package; chip capacitor effectiveness; chip capacitor placement design; chip capacitors; microprocessor packaging; performance evaluation; power delivery network; Capacitors; Costs; Electronics packaging; Frequency; Inductance; Microprocessors; Noise reduction; Performance analysis; Plastic packaging; Predictive models;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1999
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5597-0
DOI :
10.1109/EPEP.1999.819220
