Title :
A TaSi2 masked and plasma etched self-aligned SOS FET
Author_Institution :
Sch. of Eng. & Comput. Sci., Oakland Univ., Rochester, MI, USA
Abstract :
A self-aligned Ta silicide poly-silicon gate SOS junction field effect transistor is described. The active N-layer was formed by phosphorus ion implantation into high resistivity silicon on sapphire resulting in an electron density of about 5×1016/cm3. Poly-silicon film was then deposited on SOS by CVD method at 700°C. This film was undoped as deposited which was subsequently implanted with boron ion to form P+ layer. Ta silicide film with thickness of 2000 A was deposited on this P+ poly- silicon film by spattering. The major processes for fabricating the self-aligned gate JFET include the definition of the gate region followed by phosphorus implantation to from N+ contact to source and drain electrodes. The I-V characteristics of the junction FET so fabricated showed complete channel pinch-off with DC transconductance varying from 0.1 to 2.5 ms/mm gate width depending on the channel conductance
Keywords :
ion implantation; junction gate field effect transistors; masks; sputter etching; tantalum compounds; CVD film; DC transconductance; I-V characteristics; Si-Al2O3; TaSi2; TaSi2 mask; channel pinch-off; electron density; fabrication; ion implantation; plasma etching; polysilicon gate; self-aligned SOS JFET; silicide film; silicon on sapphire; sputtering; Boron; Conductivity; Electrodes; Electrons; FETs; Ion implantation; Semiconductor films; Silicides; Silicon; Transconductance;
Conference_Titel :
Electron Devices Meeting, 1996., IEEE Hong Kong
Print_ISBN :
0-7803-3091-9
DOI :
10.1109/HKEDM.1996.566300