Title :
Test structures and measurement of gate sidewall junction capacitance in MOSFETs
Author :
Hasegawa, Nobumasa ; Yamaura, Shinji ; Mori, Toshihiko ; Yamaguchi, Seiichiro
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
Abstract :
A simple method of measuring the gate sidewall capacitance (cjg) in MOSFETs is presented. Cjg measurement of a short-channel transistor (Lmin = 40 nm) was successfully achieved by 2-port S-parameter measurement. Furthermore, a merging of source and drain depletion layers and an increase in substrate resistance, both caused by expansion of source and drain depletion layers, were observed through Cjg measurement for the first time.
Keywords :
MOSFET; S-parameters; capacitance measurement; semiconductor device measurement; 40 nm; MOSFET; S-parameter measurement; depletion layers; gate sidewall junction capacitance measurement; short-channel transistor; substrate resistance; CMOS technology; Capacitance measurement; Circuit testing; Contact resistance; Electrical resistance measurement; Equivalent circuits; Fingers; Frequency; MOSFETs; Measurement standards;
Conference_Titel :
Microelectronic Test Structures, 2006. ICMTS 2006. IEEE International Conference on
Print_ISBN :
1-4244-0167-4
DOI :
10.1109/ICMTS.2006.1614269
