Design of Array Signal Processing System Based on TMS320C6678

Author

Xiangyang, Li

Author_Institution

Dept. of Comput. Sci., Guangdong AIB Polytech. Coll., Guangzhou, China

fYear

2013

fDate

9-11 Sept. 2013

Firstpage

611

Lastpage

616

Abstract

While the traditional single-processor system can not meet the requirements of modern array signal system, a new high-speed parallel system based on DSPs and FPGA is designed. The system complies with VITA 46 standard. The paper introduces the system design in detail, including system architecture, DSP subsystem and FPGA subsystem. The system based on TMS320C6678 can apply widely in the voice processing, sonar, radar, communication, real-time image processing and other high-speed signal processing fields.

Keywords

array signal processing; digital signal processing chips; field programmable gate arrays; parallel processing; DSP subsystem; FPGA subsystem; TMS320C6678; VITA 46 standard; array signal processing system design; communication processing; digital signal processor; field programmable gate array; high-speed parallel system; high-speed signal processing; radar processing; realtime image processing; sonar processing; voice processing; Arrays; Clocks; Digital signal processing; Field programmable gate arrays; Power supplies; SDRAM; SRIO; TMS320C6678; VPX; array signal; parallel processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Networking and Collaborative Systems (INCoS), 2013 5th International Conference on

Conference_Location

Xi´an

Type

conf

DOI

10.1109/INCoS.2013.114

Filename

6630497