Use of structural tests in RTL verification

Functional verification is a major hurdle in todaypsilas design flow. Current technologies are not meeting the challenges imposed by design complexity. Dark corners detection is still the simulation bottleneck in the verification process. While functional verification remains not sufficiently mature, test techniques are improved and completely automated, accordingly complex circuits can be tested in few seconds and hard faults can be covered with no effort. In this paper, we establish the relationship existing between dark corners and hard faults. Based on this relation, we explore the use of structural test patterns in the verification process and compare the results to well-known verification techniques.