DocumentCode
3514161
Title
Study of n-channel MOSFETs with an enclosed-gate layout in a 0.18 micron CMOS technology
Author
Chen, Li ; Gingrich, Douglas M.
Author_Institution
Dept. of Electr. & Comput. Eng., South Dakota Sch. of Mines & Technol., Rapid City, SD, USA
Volume
2
fYear
2004
fDate
16-22 Oct. 2004
Firstpage
1344
Abstract
Enclosed-gate layout MOSFETs with guard rings have been fabricated in a commercial 0.18 micron CMOS technology. The static, signal, and noise performance of the MOSFETs were determined before and after being subjected to ionizing radiation. The transistor design could provide the basis for low-noise radiation-tolerant circuits.
Keywords
CMOS integrated circuits; MOSFET; ionisation chambers; 0.18 mum; CMOS technology; enclosed-gate layout; guard rings; ionizing radiation; low-noise radiation-tolerant circuits; n-channel MOSFET; transistor design; CMOS process; CMOS technology; Geometry; Integrated circuit noise; Integrated circuit technology; Ionizing radiation; Leakage current; MOSFETs; Semiconductor device manufacture; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium Conference Record, 2004 IEEE
ISSN
1082-3654
Print_ISBN
0-7803-8700-7
Electronic_ISBN
1082-3654
Type
conf
DOI
10.1109/NSSMIC.2004.1462447
Filename
1462447
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