DocumentCode :
351458
Title :
Test synthesis for mixed-signal SOC paths
Author :
Ozev, Sule ; Bayraktaroglu, Ismet ; Orailogiu, A.
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
fYear :
2000
fDate :
2000
Firstpage :
128
Lastpage :
133
Abstract :
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today´s SOC´s necessitate hierarchical test generation and system level test composition to meet stringent market requirements. In this paper a novel methodology for testing analog and digital components in a signal path is discussed. Consequent testability analysis can be utilized to reduce DFT requirements, while test translation provides highly effective low cost test. The proposed approach seamlessly propagates test information across the analog/digital divide. Experimental results substantiate the effectiveness of the proposed mixed-signal test synthesis methodology
Keywords :
integrated circuit testing; mixed analogue-digital integrated circuits; mixed-signal SOC path; system-on-a-chip; test synthesis; Circuit synthesis; Circuit testing; Computer science; Costs; Digital filters; Electronic switching systems; Semiconductor device manufacture; Semiconductor device noise; Signal processing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
Type :
conf
DOI :
10.1109/DATE.2000.840028
Filename :
840028
Link To Document :
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