Programmable hardware implementation for the median-rational hybrid filters

Thee Median-Rational Hybrid Filter (MRHF) has been recently introduced as a new class of nonlinear filters and successfully applied to image filtering problems. The main characteristics of the MRHF are the good noise attenuation property in smooth areas and the preservation of edges end details. In fact, in changing areas the noise attenuation is traded for a good response to the change. Moreover, the median filters effectively remove the impulsive noise while the rational filter performs well in relatively high SNR Gaussian contaminated environments. Another relevant characteristic is that MRHF´s usually act on small windows and thus require a reduced number of operations, resulting in simple and fast filtering structures. In this paper we present a programmable hardware implementation for the MRHF´s. Exploiting the features of the dynamic logic families it is possible to achieve high speed and compactness, while keeping the power dissipation very low