DocumentCode :
3514920
Title :
Topological patterns identification for sneak circuit analysis
Author :
Chen, Bolin
Author_Institution :
Dept. of Appl. Math., Northwestern Polytech. Univ., Xi´´an, China
fYear :
2009
fDate :
20-24 July 2009
Firstpage :
133
Lastpage :
137
Abstract :
In sneak circuit analysis, it demands to identify the basic topological patterns which are the causes of sneak circuits. In this paper we formulate the problem of identifying the basic topological patterns into that of enumerating subgraphs homeomorphic to five specific signed trees in signed graphs, and give methods to simplify signed graphs and an algorithm to find all paths from a given vertex to a set of vertices of degree one in a graph. We propose a sketch algorithm for enumerating subgraphs homeomorphic to the specific signed trees and present an example of topological patterns identification using our methods.
Keywords :
graph theory; integrated circuit reliability; network analysis; network topology; trees (electrical); enumerating subgraphs homeomorphic; signed graphs; sketch algorithm; sneak circuit analysis; topological patterns identification; trees; Aerospace electronics; Aircraft; Circuit analysis; Circuit analysis computing; Mathematics; Pattern analysis; Software algorithms; Software quality; Space technology; Tree graphs; Topological patterns identification; enumeration algorithm; sneak circuit analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability, Maintainability and Safety, 2009. ICRMS 2009. 8th International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-4903-3
Electronic_ISBN :
978-1-4244-4905-7
Type :
conf
DOI :
10.1109/ICRMS.2009.5270222
Filename :
5270222
Link To Document :
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