Die-level integration of metal MEMS with CMOS

The integration of CMOS electronics with MEMS (micro-electro-mechanical systems) is attractive because it allows MEMS components to be co-located with their associated control and signal processing circuits. However, monolithic integration of electronics with micromechanics generally involves a high initial investment, and can be difficult because of process and material incompatibilities. One approach which avoids some of these issues, and is applicable to low-temperature metal MEMS processes, is to post-process IC (integrated circuit) dies that have been implanted in a carrier wafer. We have developed a process of this type in which CMOS dies are embedded in a 100 mm-dia BSOI (bonded silicon on insulator) carrier. Deep reactive ion etching (DRIE) is used to form die cavities in the device layer, stopping at the buried oxide. The cavity depth is finely adjusted by thinning the device layer so that top surface of each die will lie within plusmn2 mum of the carrier surface. Once the dies have been placed, a layer of photoresist is spin-coated over the carrier. This serves the dual role of fixing the dies in place and planarizing the top surface. Windows are opened in this layer to allow electrical and mechanical contact to the underlying dies. Fabrication of metal MEMS by pattern electroplating can then be performed as on a normal wafer. We have used this approach to fabricate high-Q, self-assembled inductors over 0.18 mum CMOS circuits supplied by a commercial foundry.