Title :
Rise-time effects in ggnMOSt under TLP stress
Author :
Boselli, G. ; Mouthaan, A.J. ; Kuper, F.G.
Author_Institution :
Dept. of Electr. Eng., Twente Univ., Enschede, Netherlands
Abstract :
In this paper the main mechanisms that lead the turn on of the parasitic bipolar transistor of a grounded gate nMOS transistor (ggnMOS) under TLP stress have been analyzed in detail in the sub-nanoseconds range by means of a mixed-mode simulator. We showed that the breakdown voltage of the ggnMOS measured in static conditions would underestimate the maximum voltage across the protection structure obtained by TLP stress, depending on the rise-time of the applied pulse
Keywords :
MOSFET; electrostatic discharge; protection; semiconductor device breakdown; ESD protection; breakdown voltage; grounded gate nMOS transistor; mixed-mode simulation; parasitic bipolar transistor; rise time; transmission line pulse stress; Bipolar transistors; Breakdown voltage; CMOS technology; Circuit simulation; Electrostatic discharge; MOSFETs; Protection; Pulse measurements; Stress; Testing;
Conference_Titel :
Microelectronics, 2000. Proceedings. 2000 22nd International Conference on
Conference_Location :
Nis
Print_ISBN :
0-7803-5235-1
DOI :
10.1109/ICMEL.2000.840588
