Power estimation of 1-d Cellular Automata circuits

During the last decades Cellular Automata (CAs) have been extensively used as powerful computational tool able to represent phenomena of arbitrary complexity and at the same time can be simulated exactly by digital computers, because of their intrinsic discreteness. Furthermore, due to their simple, regular, modular and cascadable structure with local interconnections CAs algorithms are ideally suited for hardware implementation. On the other hand, power dissipation is recognized as a critical parameter in modern VLSI design field. In this paper a power estimation model based on CAs is proposed. With the help of this model the power consumption of 1-d CAs rules logic circuits is investigated in details. More specifically, CMOS power consumption estimation measurements for the entireness of 1-d CAs rules as well as entropy variation measurements were conducted based on the proposed model. The presented simulation results prove the robustness of the aforementioned model and discuss the Wolfram 1-d CAs classes categorization based on the produced power estimation results and depending on the corresponding initial conditions.