DocumentCode :
3515897
Title :
Error-Aware Design
Author :
Kurdahi, Fadi ; Eltawil, Ahmed ; Djahromi, Amin K. ; Makhzan, Mohammad ; Cheng, Stanley
Author_Institution :
EECS Dept, Univ. of California, Irvine, CA, USA
fYear :
2007
fDate :
29-31 Aug. 2007
Firstpage :
8
Lastpage :
15
Abstract :
The universal underlying assumption made today is that systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications - by construction - are inherently error tolerant and therefore do not require this strict bound of 100% correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields.
Keywords :
integrated circuit design; low-power electronics; system-on-chip; error-aware design; imaging field application; supply voltage; systems on chip; wireless communication fields; Application software; Computer errors; Dynamic voltage scaling; Energy consumption; Frequency; Logic; Random access memory; Redundancy; Throughput; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on
Conference_Location :
Lubeck
Print_ISBN :
978-0-7695-2978-3
Type :
conf
DOI :
10.1109/DSD.2007.4341443
Filename :
4341443
Link To Document :
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