Design and Implementation of a 50MHZ DXT CoProcessor

Author

Amiri, Mohammad Amin ; Atani, Reza Ebrahimi ; Mirzakuchaki, Sattar ; Mahdavi, Mojdeh

Author_Institution

Iran Univ. of Sci. & Technol., Tehran, Iran

fYear

2007

fDate

29-31 Aug. 2007

Firstpage

43

Lastpage

50

Abstract

Frequency analysis using the DFT, the DHT, the DCT or the DST is an obvious choice for signal processing domain. This paper describes the implementation of a DXT coprocessor of transform length ´8´ for the synchronous design in a 0.22 LM Flash-based FPGA device (ACTEL). The total dynamic power of 359.24 mW, with an operating frequency of 50 MHz and an operating voltage of 2.5 V is achieved. The paper presents the trade-offs involved in designing the architecture, the design for performance issues and the possibilities for future development.

Keywords

coprocessors; digital signal processing chips; discrete Fourier transforms; discrete Hartley transforms; discrete cosine transforms; field programmable gate arrays; flash memories; frequency-domain analysis; integrated circuit design; logic design; reconfigurable architectures; DCT; DFT; DHT; DST; DXT coprocessor architecture design; discrete Hartley transform; discrete cosine transform; discrete sine transform; flash-based FPGA device; frequency 50 MHz; frequency analysis; power 359.24 mW; signal processing domain; synchronous design; voltage 2.5 V; Biomedical computing; Biomedical signal processing; Computer architecture; Coprocessors; Digital signal processing; Discrete cosine transforms; Discrete transforms; Field programmable gate arrays; Speech processing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on

Conference_Location

Lubeck

Print_ISBN

978-0-7695-2978-3

Type

conf

DOI

10.1109/DSD.2007.4341448

Filename

4341448