DocumentCode
3516161
Title
Modeling the performance of cluster-based fabs
Author
Wood, Samuel C. ; Saraswat, Krishna C.
Author_Institution
Center for Integrated Syst., Stanford Univ., CA, USA
fYear
1991
fDate
20-22 May 1991
Firstpage
8
Lastpage
14
Abstract
The economic performance of cluster tools is evaluated by modeling a hypothetical cluster-based fab, where almost all of a 0.6-μm DRAM (dynamic random-access memory) process flow is performed in cluster tools. A conventional fab under the same cost constraint running the same flow is also modeled as a base for comparison. From this model, a number of inherent differences between cluster-based fabs and conventional fabs are observed and described. Monte Carlo cost-based simulations are then run on the two fabs to compare the potential cost and throughput time performance of the fabs. Results suggest that the cluster-based fab can operate at considerably reduced throughput times for a relatively small cost per wafer premium. Modeling the cluster-based fab revealed a number of fab design and management issues that are much less significant or nonexistent for conventional fabs. These issues include configuration and scheduling, lot size, and scaling the fab
Keywords
DRAM chips; Monte Carlo methods; economics; integrated circuit manufacture; manufacturing data processing; production control; scheduling; 0.6 micron; DRAM process flow; Monte Carlo cost-based simulations; cluster tools; cluster-based fabs; configuration; economic performance; lot size; modeling; scaling; scheduling; throughput time performance; Communication standards; Costs; Manufacturing processes; Monitoring; Performance evaluation; Production; Pulp manufacturing; Random access memory; Semiconductor device manufacture; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing Science Symposium, 1991. ISMSS 1991., IEEE/SEMI International
Conference_Location
Burlingame, CA
Print_ISBN
0-7803-0027-0
Type
conf
DOI
10.1109/ISMSS.1991.146258
Filename
146258
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