DocumentCode :
3516585
Title :
Megasonic enhanced wafer bumping process to enable high density electronics interconnection
Author :
Tian, Yingtao ; Kaufrnann, J. ; Liu, Changqing ; Hutt, David A. ; Stevens, Bob ; Desmulliez, Marc Philippe Y.
Author_Institution :
Wolfson Sch. of Mech. & Manuf. Eng., Loughborough Univ., Loughborough
fYear :
2008
fDate :
1-4 Sept. 2008
Firstpage :
725
Lastpage :
730
Abstract :
The assembly of hybrid pixel detectors requires direct interconnection between the readout chip and sensor chip. In such systems, the connection pitch size may be below 50 mum, such that the packing density (i.e. I/Os) may exceed 40,000/cm2. Electroplating is a promising approach to enable low-cost, high yield and ultra-fine pitch bumping. This paper reports an ultra-fine pitch electroplating bumping process which can be enhanced by incorporating megasonic agitation. Acoustic agitation at above 1 MHz frequencies is able to significantly reduce the diffusion boundary layer of electroplating to a thickness less than 1 mum, as compared to tens of microns under conventional plating conditions. The initial experimental results presented here demonstrate an enhanced polycrystalline growth other than dendrite deposition under a very high current density through megasonic agitation deposition, thereby allowing a significant acceleration of the electrodeposition process. For the electroplating wafer bumping process, megasonic agitation can also accelerate the bump growth rate under the same current density, due to the increase of cathodic current efficiency. Also, megasonic agitation appears not to damage the photoresist pattern, which is often the case when ultrasonic agitation is used.
Keywords :
electroplating; integrated circuit interconnections; photoresists; readout electronics; wafer-scale integration; acoustic agitation; cathodic current efficiency; diffusion boundary layer; electrodeposition process; electroplating; high density electronics interconnection; hybrid pixel detectors; megasonic agitation; megasonic enhanced wafer bumping; photoresist pattern; polycrystalline growth; readout chip; sensor chip; ultra-fine pitch bumping; Acceleration; Assembly; Cleaning; Current density; Frequency; Laboratories; Manufacturing; Microstructure; Packaging; Resists;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics System-Integration Technology Conference, 2008. ESTC 2008. 2nd
Conference_Location :
Greenwich
Print_ISBN :
978-1-4244-2813-7
Electronic_ISBN :
978-1-4244-2814-4
Type :
conf
DOI :
10.1109/ESTC.2008.4684440
Filename :
4684440
Link To Document :
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