Title :
FPGA based signal processing structures
Author :
Lie, I. ; Beschiu, C. ; Nanu, S.
Author_Institution :
Appl. Electron. Dept., Politeh. Univ. of Timisoara, Timisoara, Romania
Abstract :
This paper presents the implementation method for two signal processing structures, a digital FIR filter and a discrete Fourier transform, using programmable logic structures and VHDL hardware description language.
Keywords :
FIR filters; discrete Fourier transforms; field programmable gate arrays; hardware description languages; signal processing; FPGA based signal processing structures; VHDL hardware description language; digital FIR filter; discrete Fourier transform; field programmable gate array; programmable logic structures; Field programmable gate arrays; Finite impulse response filter; Generators; IP networks; Signal processing algorithms; FPGA; IP Core; System Generator; digital filter;
Conference_Titel :
Applied Computational Intelligence and Informatics (SACI), 2011 6th IEEE International Symposium on
Conference_Location :
Timisoara
Print_ISBN :
978-1-4244-9108-7
DOI :
10.1109/SACI.2011.5873043
