Title :
Distributed RLGC transient model of coupled interconnects in DSM chips for crosstalk noise simulation
Author :
Palit, Ajoy K. ; Hasan, Shehzad ; Duganapalli, Kishore K. ; Anheier, Walter
Author_Institution :
FB1/ITEM, Univ. of Bremen, Bremen
Abstract :
Noise effects in coupled interconnects, i.e. crosstalk induced glitch and crosstalk induced delay can significantly impact the performance of deep sub-micron (DSM) chips. Therefore, in this paper distributed RLGC transient model of coupled interconnects has been developed that will be useful for analyzing such crosstalk noise effects in DSM chips. The model accuracy is quite comparable to the PSPICE simulation results and yet the simulation speed is at least 11 times faster than the latter.
Keywords :
SPICE; capacitance; crosstalk; electric admittance; electric resistance; inductance; integrated circuit interconnections; integrated circuit noise; PSPICE simulation; coupled interconnects; crosstalk induced delay; crosstalk induced glitch; crosstalk noise effects; deep submicron chips; distributed resistance inductance conductance capacitance networks; Capacitance; Coupled mode analysis; Crosstalk; Inductance; Integrated circuit modeling; Mutual coupling; Noise figure; SPICE; Transient response; Voltage;
Conference_Titel :
Electronics System-Integration Technology Conference, 2008. ESTC 2008. 2nd
Conference_Location :
Greenwich
Print_ISBN :
978-1-4244-2813-7
Electronic_ISBN :
978-1-4244-2814-4
DOI :
10.1109/ESTC.2008.4684517
