• DocumentCode
    3517911
  • Title

    Silicide as diffusion source for dopant segregation in 70-nm MOSFETs with PtSi Schottky-barrier source/drain on ultrathin-body SOI

  • Author

    Qiu, Z.J. ; Zhang, Z. ; Lu, J. ; Liu, R. ; Östling, M. ; Zhang, S.-L.

  • fYear
    2008
  • fDate
    12-14 March 2008
  • Firstpage
    23
  • Lastpage
    26
  • Abstract
    In this paper, dopant segregation (DS) method is adopted to enhance device performance of PtSi-based Schottky-barrier source/drain MOSFETs (SB-MOSFETs) fabricated on ultrathin silicon-on-insulator. The DS formation is realized by means of Silicide As Diffusion Source. Without DS treatment, the devices are typically p-type, but with a rather large electron branch at positive gate bias. Dopant segregation with As is found to turn the devices to well-performing n-MOSFETs, and DS with B to greatly enhance the hole conduction in the p-MOSFETs. A large threshold voltage (Vt) shift is however observed in the p-MOSFET due to B lateral spread caused during the drive-in process for the DS formation. By reducing the drive-in temperature, this problem is partially addressed with a smaller Vt shift and a much better control of short channel effect.
  • Keywords
    MOSFET; Schottky barriers; silicon compounds; silicon-on-insulator; MOSFET; Schottky-barrier source; dopant segregation; silicide; silicon-on-insulator; size 70 nm; ultrathin-body SOI; Annealing; CMOS technology; Counting circuits; Doping; Fabrication; MOSFET circuits; Silicides; Silicon on insulator technology; Temperature; Threshold voltage; SADS; Schottky-barrier MOSFET; dopant segregation; threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Ultimate Integration of Silicon, 2008. ULIS 2008. 9th International Conference on
  • Conference_Location
    Udine
  • Print_ISBN
    978-1-4244-1729-2
  • Electronic_ISBN
    978-1-4244-1730-8
  • Type

    conf

  • DOI
    10.1109/ULIS.2008.4527133
  • Filename
    4527133