High frequency characterization of SOI dynamic threshold voltage MOS (DTMOS) transistors

Author

Ferlet-Cavrois, V. ; Bracale, A. ; Fel, N. ; Musseau, O. ; Raynaud, C. ; Faynot, O. ; Pelloie, J.L.

Author_Institution

CEA, Centre d´Etudes de Bruyeres-le-Chatel, France

fYear

1999

fDate

4-7 Oct. 1999

Firstpage

24

Lastpage

25

Abstract

The DTMOS architecture is particularly suited to very low supply voltage applications (0.5-0.6 V) (Colinge, 1987; Matloubian, 1993; Assaderaghi et al., 1994; Pelloie et al., 1999). This paper presents the high frequency behavior of DTMOS devices processed with a partially depleted 0.25 /spl mu/m SOI technology (Wilson et al., 1997; Lagnado and de la Houssaye, 1997; Cable, 1997; Ferlet-Cavrois et al., 1998; Tanaka et al., 1997). The paper compares DTMOS to floating body and grounded body MOS transistors, and shows the advantage of SOI DTMOS for very low power portable telecommunication systems.

Keywords

MOSFET; low-power electronics; microwave field effect transistors; semiconductor device measurement; silicon-on-insulator; telecommunication equipment; 0.25 micron; 0.5 to 0.6 V; DTMOS architecture; DTMOS devices; SOI DTMOS; SOI DTMOS transistors; SOI dynamic threshold voltage MOS transistors; Si-SiO/sub 2/; floating body MOS transistors; grounded body MOS transistors; high frequency behavior; high frequency characterization; partially depleted SOI technology; very low power portable telecommunication systems; very low supply voltage applications; CMOS technology; Calibration; Design optimization; Electrical resistance measurement; Frequency; Isolation technology; Low voltage; MOSFETs; Threshold voltage; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1999. Proceedings. 1999 IEEE International

Conference_Location

Rohnert Park, CA, USA

ISSN

1078-621X

Print_ISBN

0-7803-5456-7

Type

conf

DOI

10.1109/SOI.1999.819840

Filename

819840