DocumentCode :
3518201
Title :
SOI MOSFET fluctuation limits on gigascale integration (GSI)
Author :
Xinghai Tang ; De, V.K. ; Lihui Wang ; Meindl, J.D.
Author_Institution :
Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
1999
fDate :
4-7 Oct. 1999
Firstpage :
42
Lastpage :
43
Abstract :
Intrinsic and extrinsic threshold voltage (V/sub ts/) fluctuations in fully depleted (FD) single gate (SG) and dual gate (DG) SOI MOSFETs as well as partially depleted (PD) SOI MOSFETs are investigated using novel 3D compact physical models. Threshold voltage maximum deviations due to intrinsic random dopant placement can escalate to more than /spl plusmn/100% for sub-100 nm technology generations. Much smaller (<1.5 mV) intrinsic threshold voltage fluctuations in undoped SOI MOSFETs are explored.
Keywords :
MOSFET; ULSI; doping profiles; fluctuations; integrated circuit design; integrated circuit modelling; semiconductor device models; silicon-on-insulator; 1.5 mV; 100 nm; 3D compact physical models; GSI; SOI MOSFET fluctuation limits; Si-SiO/sub 2/; extrinsic threshold voltage fluctuations; fully depleted dual gate SOI MOSFETs; fully depleted single gate SOI MOSFETs; gigascale integration; intrinsic random dopant placement; intrinsic threshold voltage fluctuations; partially depleted SOI MOSFETs; threshold voltage maximum deviations; undoped SOI MOSFETs; Analytical models; Doping; Insulation; MOSFET circuits; Microelectronics; Semiconductor process modeling; Semiconductor thin films; Silicon on insulator technology; Threshold voltage; Voltage fluctuations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 1999. Proceedings. 1999 IEEE International
Conference_Location :
Rohnert Park, CA, USA
ISSN :
1078-621X
Print_ISBN :
0-7803-5456-7
Type :
conf
DOI :
10.1109/SOI.1999.819849
Filename :
819849
Link To Document :
بازگشت