Building hybrid active pixels for CMOS imager on SOI substrate

CMOS active pixel sensors (APS) use the advantages of mature CMOS manufacturing technology and are competing with the currently dominant CCD technology in the state-of-the-art imaging applications that require low power, high integration and complex functionality. SOI technology has been proven to be advantageous in many applications compared with conventional bulk technology. However, image sensor integration on SOI substrates suffers from low quantum efficiency, which inhibits the development of SOI imaging systems. To overcome the barrier, CMOS compatible devices with self-amplification have been reported (Zhang et al. 1998; Yamamoto et al. 1996). However, the use of the high gain properties required a stable process and an accurate model for predicting the output, which are both not yet available. In this paper, we have investigated the performance of a hybrid active pixel structure. In this approach, the photodiode is built on the bottom substrate, while the reset transistor and the in-pixel amplifying transistor are built on the top silicon film. The performance of the APS is expected to be similar to the bulk technology, with potentially higher speed due to the lower capacitance that the photodiode has to drive in SOI technology. However, as a minimal deviation from the conventional SOI CMOS process is used to fabricate the APS, the photodiode is less optimized than current bulk technology. The operation of the APS in different configurations under different light intensities was studied and is reported.