DocumentCode
3518983
Title
A comparison of hardware efficient dynamic element matching networks for digital to analog converters
Author
Bruce, J.W. ; Stubberud, Peter
Author_Institution
Dept. of Electr. & Comput. Eng., Mississippi State Univ., MS, USA
Volume
2
fYear
2000
fDate
2000
Firstpage
672
Abstract
Many dynamic element matching (DEM) algorithms for digital to analog use interconnection networks. In this paper, performance metrics that can compare interconnection networks used in DEM algorithms are introduced. Using these performance metrics, several interconnection networks are compared. Finally, two new hardware efficient networks for DEM are introduced
Keywords
digital-analogue conversion; digital-to-analog converter; dynamic element matching algorithm; hardware efficiency; interconnection network; performance metric; Circuits and systems; Computer architecture; Digital-analog conversion; Hardware; Integrated circuit interconnections; Logic circuits; Logic gates; Measurement; Multiprocessor interconnection networks; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.952846
Filename
952846
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