A study on delta-sigma A/D-converters based on SSCT-technology

Author

Rapakko, Harri ; Kostamovaara, Juha

Author_Institution

Electron. Lab., Dept. of Electr. Eng. & Infotech Oulu, Finland

Volume

2

fYear

2000

fDate

2000

Firstpage

680

Abstract

Eight sigma-delta A/D-converters were designed and measured. Instead of an operational amplifier based integrator topology a new switched capacitor integrator topology (SSCT, Self Switched Charge Transfer) was used. The purpose of the study was to find out the properties of the new integrator topology and its applicability to a ΣΔ-modulator. The sampling frequency of the realised ΔΣ-modulators is 13 MHz and the decimated sample rate is 271 kHz. The maximum measured SNR and THD were 54 dB and 72 dB. Measured PSRR_± of the circuit was 30 dB at 130 kHz. The current consumption was 110 μA. With increased bias current the same modulators could be operated up to 55 MHz clock frequency. At 50 MHz the realization offered 40 dB SINAD with 1 MHz bandwidth. The current consumption was 250 μA. Minimum PSRR_± at the signal band was 28 dB. The supply voltage was 2.7 V

Keywords

circuit noise; harmonic distortion; integrating circuits; low-power electronics; sigma-delta modulation; switched capacitor networks; 1 MHz; 110 to 250 muA; 13 to 55 MHz; 2.7 V; PSRR; SINAD; SNR; SSCT cell; THD; low-power circuit; self-switched charge transfer; sigma-delta A/D converter; switched capacitor integrator topology; Bandwidth; Capacitors; Charge transfer; Circuit topology; Clocks; Delta-sigma modulation; Frequency; Integrated circuit measurements; Operational amplifiers; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on

Conference_Location

Lansing, MI

Print_ISBN

0-7803-6475-9

Type

conf

DOI

10.1109/MWSCAS.2000.952848

Filename

952848