Title :
CMOS VLSI implementation of 16-bit logarithm and anti-logarithm converters
Author :
Abed, Khalid H. ; Siferd, Raymond E.
Author_Institution :
Electr. Eng., Wright State Univ., Dayton, OH, USA
Abstract :
This paper presents two unique 16-bit binary-to-binary logarithm and binary logarithm-to-binary converters including their CMOS VLSI implementations. Both converters are implemented using combinational logic only, and they calculate Mitchell´s logarithm and anti-logarithm approximations in a single clock cycle. Simulations of the 0.6 μ CMOS design for the logarithm and anti-logarithm converters ran at 150 and 178 MHz, respectively. A novel leading one detector circuit is designed to obtain the leading one position
Keywords :
CMOS logic circuits; VLSI; combinational circuits; convertors; detector circuits; digital arithmetic; 0.6 micron; 150 MHz; 16 bit; 178 MHz; CMOS VLSI; Mitchell approximation; anti-logarithm converter; binary logarithm-to-binary converter; binary-to-binary logarithm converter; combinational logic; leading one detector circuit; logarithm converter; Acoustical engineering; Arithmetic; Brightness; CMOS logic circuits; Circuit simulation; Clocks; Detectors; Earthquake engineering; Radio access networks; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
DOI :
10.1109/MWSCAS.2000.952871
