DocumentCode
3519595
Title
Low-power direct digital frequency synthesizer
Author
Curticapean, Florean ; Niittylahti, Jarkko
Author_Institution
Digital & Comput. Syst. Lab., Tampere Univ. of Technol., Finland
Volume
2
fYear
2000
fDate
2000
Firstpage
822
Abstract
A new architecture for a direct digital frequency synthesizer (DDFS) is presented. The introduced technique reduces both the ROM storage requirements and the amount of additional logic and thus exhibits significant potential for low-power applications. Several design examples are described in the paper and compared with conventional designs
Keywords
CMOS digital integrated circuits; VLSI; direct digital synthesis; low-power electronics; read-only storage; CMOS; DDFS; ROM storage requirements; VLSI; direct digital frequency synthesizer; lookup tables; low-power applications; portable wireless communications; CMOS technology; Clocks; Computer architecture; Frequency synthesizers; Hardware; Laboratories; Logic; Phase locked loops; Read only memory; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.952882
Filename
952882
Link To Document