Low-cost jitter measurement technique for phase-locked loops

Author

Voorakaranam, Ram ; Chatterjee, Abhijit

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

2

fYear

2000

fDate

2000

Firstpage

956

Abstract

A new low-cost technique for jitter measurement of phase-locked loops (PLLs) is described. The proposed technique can be applied to PLLs whose jitter is predominantly due to power supply noise. Accurate measurement of jitter to picosecond accuracy using conventional methods requires very high-cost tester instrumentation. By modulating the supply voltage to the PLL and noting that PLL jitter is extremely sensitive to power supply variations, it is possible to introduce significant jitter into the PLL output which can be measured using a low-cost tester During production test, a regression model is used to predict the inherent PLL jitter from the measurement of power supply induced jitter

Keywords

electric noise measurement; integrated circuit economics; integrated circuit measurement; integrated circuit noise; integrated circuit testing; jitter; phase locked loops; production testing; 25 MHz; 25 MHz charge-pump PLL; PLL; low-cost jitter measurement technique; low-cost tester; phase-locked loops; picosecond accuracy; power supply induced jitter; power supply noise; power supply variations; production test; regression model; simulation results; supply voltage modulation; Instruments; Jitter; Measurement techniques; Phase locked loops; Phase measurement; Power measurement; Power supplies; Production; Testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on

Conference_Location

Lansing, MI

Print_ISBN

0-7803-6475-9

Type

conf

DOI

10.1109/MWSCAS.2000.952912

Filename

952912