Implementation of an ultra-high speed 256-point FFT for Xilinx Virtex-6 devices

Author

Dreschmann, Michael ; Meyer, Joachim ; Hübner, Michael ; Schmogrow, R. ; Hillerkuss, D. ; Becker, Jürgen ; Leuthold, Juerg ; Freude, Wolfgang

Author_Institution

Inst. of Inf. Process. Technol., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany

fYear

2011

fDate

26-29 July 2011

Firstpage

829

Lastpage

834

Abstract

In this paper we present a parallel, FPGA-based implementation of a 256-point Fast Fourier Transform capable to perform over 78 million transformations per second. Its area of operation is located in the ultra-high speed OFDM communication in optical networks where the FFT algorithm provides the basis of the digital signal processing. The main focus lies on an implementation using as less as possible resources while ensuring the required high performance. However, to allow an adaptation of the core to different applications, a flexible adaptivity of internal bit vector widths was realized.

Keywords

OFDM modulation; digital signal processing chips; fast Fourier transforms; field programmable gate arrays; optical fibre networks; FPGA; Xilinx Virtex-6 device; digital signal processing; flexible adaptivity; internal bit vector width; optical network; ultra-high speed 256-point FFT; ultra-high speed OFDM communication; Field programmable gate arrays; OFDM; Optimization; Pipeline processing; Registers; Signal processing algorithms; Timing; FFT; FPGA; High Speed; Multiplier; OFDM; Virtex-6;

fLanguage

English

Publisher

ieee

Conference_Titel

Industrial Informatics (INDIN), 2011 9th IEEE International Conference on

Conference_Location

Caparica, Lisbon

Print_ISBN

978-1-4577-0435-2

Electronic_ISBN

978-1-4577-0433-8

Type

conf

DOI

10.1109/INDIN.2011.6035000

Filename

6035000