• DocumentCode
    3520446
  • Title

    High frequency characterization of through silicon via structure

  • Author

    Mong, Khoo Yee ; Kee, Chua Eng ; Guan, Lim Teck ; Enxiao, Liu

  • Author_Institution
    Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
  • fYear
    2009
  • fDate
    9-11 Dec. 2009
  • Firstpage
    536
  • Lastpage
    540
  • Abstract
    In 3D package, through silicon via (TSV) have been used to achieve smaller size, better performance stacked package. However to effectively utilize TSV for high frequency package design, the high frequency performance of TSV structure has to be precisely characterized. In this work, a method that allows the high frequency extraction of TSV´s S-parameter is presented. Extraction is basically done by using a number of line test structures and back-to-back via-line-via structures. This method of extraction does away with the need to perform probing both on top and below the wafer and thus do not require the use of high cost and complex probe station setup.
  • Keywords
    S-parameters; integrated circuit packaging; integrated circuit testing; three-dimensional integrated circuits; 3D package; S-parameter; TSV structure; back-to-back via-line-via structure; high frequency package design; line test structure; stacked package; through silicon via; Costs; Frequency; Packaging; Probes; Scattering parameters; Silicon; Testing; Through-silicon vias; Wafer bonding; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2009. EPTC '09. 11th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-5099-2
  • Electronic_ISBN
    978-1-4244-5100-5
  • Type

    conf

  • DOI
    10.1109/EPTC.2009.5416491
  • Filename
    5416491