DocumentCode
3520523
Title
Understanding materials compatibility issues in electronics packaging
Author
Paulasto-Kröckel, M. ; Laurila, T. ; Vuorinen, V.
Author_Institution
Fac. of Electron. Commun. & Autom., Electron. Integration & Reliability, Helsinki Univ. of Technol., Helsinki, Finland
fYear
2009
fDate
9-11 Dec. 2009
Firstpage
494
Lastpage
499
Abstract
This paper presents a method, which helps to understand and control interactions between dissimilar materials in electronics packaging assemblies. The method consisting of thermodynamic and kinetic modeling combined with detailed microstructural analysis is introduced first. The method will then be demonstrated using three examples. First one is taken from an IC metallization level, and explains why and how TaC diffusion barrier reacts with Si. The second example discusses the impact of Cu on the microstructural evolution and degradation of Au-Al bonds. Finally, the third example deals with solder alloy reactions with Ni/Au pad finishes at a circuit board. The results presented explain the redeposition of AuSn4 phase at the pad interface when SnPbAg or SnAg solders are used.
Keywords
assembling; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; soldering; thermodynamics; Au-Al; Cu; IC metallization; Ni-Au; Si; dissimilar materials; electronics packaging assembly; interactions; kinetic modeling; materials compatibility; microstructural analysis; microstructural degradation; microstructural evolution; solder alloy reaction; thermodynamic modeling; Assembly; Automatic control; Automation; Communication system control; Electronics packaging; Kinetic theory; Materials reliability; Microelectronics; Phase change materials; Thermodynamics;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2009. EPTC '09. 11th
Conference_Location
Singapore
Print_ISBN
978-1-4244-5099-2
Electronic_ISBN
978-1-4244-5100-5
Type
conf
DOI
10.1109/EPTC.2009.5416496
Filename
5416496
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