DocumentCode :
352110
Title :
New experimental evidence of latent interface-trap buildup in power VDMOSFETs
Author :
Jaksic, A.B. ; Ristic, G.S. ; Pejovic, M.M.
Author_Institution :
Fac. of Electron. Eng., Nis, Yugoslavia
fYear :
1999
fDate :
1999
Firstpage :
262
Lastpage :
268
Abstract :
The paper presents new experimental evidence of the latent interface-trap buildup during annealing of gamma-ray irradiated power VDMOSFETs. We try to reveal the nature of this still ill-understood phenomenon by isothermal annealing, switching temperature annealing and switching bias annealing experiments. Possible explanations of obtained experimental results are discussed in the context of several models for post-irradiation behavior of radiation-induced defects
Keywords :
annealing; gamma-ray effects; interface states; power MOSFET; Si-SiO; gamma-ray irradiation; isothermal annealing; latent interface-trap buildup; power VDMOSFET; radiation-induced defects; switching bias annealing; switching temperature annealing; Annealing; Context modeling; Isothermal processes; MOS devices; MOSFETs; Medium voltage; Nitrogen; Power engineering and energy; Temperature dependence; Temperature distribution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radiation and Its Effects on Components and Systems, 1999. RADECS 99. 1999 Fifth European Conference on
Conference_Location :
Fontevraud
Print_ISBN :
0-7803-5726-4
Type :
conf
DOI :
10.1109/RADECS.1999.858592
Filename :
858592
Link To Document :
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