A novel simulation methodology for development of ESD primitives on a 0.18µm analog, mixed-signal high voltage process technology

Author

Roger, Frederic ; Cambieri, Juri ; Minixhofer, Rainer

Author_Institution

Austriamicrosystem, Schloss Premstatten, Austria

fYear

2011

fDate

8-10 Sept. 2011

Firstpage

179

Lastpage

182

Abstract

This paper presents a full simulation methodology dedicated to the ESD primitive devices development in High Voltage technology. This workflow based on layout generation, 2D, 3D and mixed-mode TCAD simulations and SPICE simulations provide robust devices sustaining ESD stress tests.

Keywords

SPICE; circuit simulation; electrostatic discharge; integrated circuit layout; mixed analogue-digital integrated circuits; power integrated circuits; technology CAD (electronics); 2D TCAD simulation; 3D TCAD simulation; ESD primitive device; ESD stress tests; SPICE simulation; analog high voltage process technology; electrostatic discharge; full simulation methodology; layout generation; mixed-mode TCAD simulation; mixed-signal high voltage process technology; size 0.18 mum; Electrostatic discharge; Integrated circuit modeling; Layout; Robustness; SPICE; Semiconductor process modeling; Solid modeling; 0.18µm High voltage technology; 2D and 3D TCAD simulation; ESD; Mixed-mode simulations; SPICE;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices (SISPAD), 2011 International Conference on

Conference_Location

Osaka

ISSN

1946-1569

Print_ISBN

978-1-61284-419-0

Type

conf

DOI

10.1109/SISPAD.2011.6035080

Filename

6035080