Title :
Synopsys´ open educational design kit: Capabilities, deployment and future
Author :
Goldman, R. ; Bartleson, K. ; Wood, T. ; Kranen, K. ; Cao, C. ; Melikyan, V. ; Markosyan, G.
Author_Institution :
Synopsys, Inc., CA, USA
Abstract :
An open Educational Design Kit (EDK) which supports a 90 nm design flow is described which includes all the necessary design rules, models, technology files, verification and extraction command decks, scripts, symbol libraries, and PCells. It also includes a Digital Standard Cell Library (DSCL) which supports all contemporary low power design techniques; an I/O Standard Cell Library (IOSCL); a set of memories (SOM) with different word and data depths; and a phase-locked loop (PLL). These components of the EDK augment any type of design for educational and research purposes. Though the EDK does not contain any foundry information, it allows real 90 nm technology with high accuracy to be implemented in the designs.
Keywords :
electronic design automation; electronic engineering education; integrated circuit design; logic design; phase locked loops; data depth; digital standard cell library; low power design technique; open educational design kit; phase locked loop; size 90 nm; CMOS technology; Data mining; Educational institutions; Educational technology; Electronic design automation and methodology; Fabrication; Foundries; Intellectual property; Phase locked loops; Software libraries;
Conference_Titel :
Microelectronic Systems Education, 2009. MSE '09. IEEE International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-4407-6
Electronic_ISBN :
978-1-4244-4406-9
DOI :
10.1109/MSE.2009.5270840
