• DocumentCode
    3524165
  • Title

    Embedded digital signal processing for digital ultrasound imaging

  • Author

    Hassan, Mawia A. ; Youssef, Abou-Bakr M. ; Kadah, Yasser M.

  • Author_Institution
    Syst. & Biomed. Eng. Dept., Cairo Univ., Giza, Egypt
  • fYear
    2011
  • fDate
    26-28 April 2011
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Ultrasound imaging is an efficient, noninvasive, method for medical diagnosis. Efficient implementations of digital ultrasound systems on embedded digital signal processing on FPGA, this miniaturization enables a design with low power consumption, low noise, and light weight. This paper proposed embedded digital signal processing (DSP) for digital ultrasound imaging on FPGA (Xilinx, Inc.). The DSP was composed of FIR Hilbert transform filter, which was used to generate Quadrature component (Q) from the In-phase component (I) of the ultrasound data. The envelope (magnitude) of the received echo was computed. The implementation has been done in the Virtex-5 FPGA. The objective of this work is to build embedded DSP for ultrasound imaging system using the FIR Hilbert transform filter, which will be described in the methods. The system was consisted of: the pipeline adder block to reconstruct the focus ultrasound line, the bit modifier block to modify the bit of the signal to 16 bit, the FIR Hilbert filter block to obtain the quadrature components, the fractional delay filter (in-phase filter) to compensate the delay when we were used a high FIR order, and the envelope detection block to compute the envelope of the in-phase and quadrature components. The Hilbert filter is implemented in the form whereby the zero tap coefficients are not computed and therefore an order L filter uses only L/2 multiplications. This was reducing the computational time by a half. The simulation results of FIR Hilbert filter and the envelope detection are near to the ideal Hilbert. The results of the implementation are good compared to the simulation results. From the implementation result the total estimated power consumption equal to 0.8142W and the device utilization was acceptable. It is possible for the system to accept anther devices for further processing. The hardware architecture of the design provided flexibility.
  • Keywords
    FIR filters; Hilbert transforms; biomedical electronics; biomedical equipment; biomedical ultrasonics; delay filters; digital signal processing chips; embedded systems; field programmable gate arrays; medical signal processing; signal processing equipment; FIR Hilbert transform filter; Virtex-5 FPGA; bit modifier block; delay compensation; digital ultrasound imaging; embedded DSP; embedded digital signal processing; envelope detection block; focus ultrasound line reconstruction; fractional delay filter; in phase filter; in phase ultrasound data component; lightweight design; low noise design; low power consumption design; medical diagnosis; pipeline adder block; power 0.8142 W; quadrature component generation; received echo envelope; received echo magnitude; signal bit modification; zero tap coefficients; Adders; Delay; Digital signal processing; Optimization; Quantization; Digital Ultrasound; Embedded DSP; FIR Hilbert transform filter; FPGA;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radio Science Conference (NRSC), 2011 28th National
  • Conference_Location
    Cairo
  • Print_ISBN
    978-1-61284-805-1
  • Type

    conf

  • DOI
    10.1109/NRSC.2011.5873642
  • Filename
    5873642