A new readout method based on source-current readout for DEPFET-based imagers

In this work, we present a CMOS ASIC design to readout monolithic array of DEPFET detectors with a new readout configuration. As it is known by previous work with this type of detector, silicon Active Pixel Sensor (APS) based on DEPFET device can provide excellent energy resolution together with high frame-rate. For these advantages, DEPFET are now under study for different state-of-the-art instruments when the low noise performance is a primary requirement. In particular, the use of DEPFET is foreseen for the next generation of astronomical missions operating in the soft X-ray band. It has been shown in our previous works that the use of a drain current readout configuration provides superior performance in term of noise and readout speed with respect to more conventional source voltage readout. Unfortunately, such readout demands a custom design of the detector because it requires that the drains of the pixels are connected column-wise for the readout while the standard DEPFET matrix has common drain contact. In this work, we will present an architecture still based on the DEPFET readout current but applied at the source terminal instead of the drain one, thus compatible with the standard DEPFET matrices produced. In order to implement this source current readout, a new ASIC, named VELA-SCR (VELA Source Current Readout), has been designed. In the following, the circuit will be shown, as well as achievable spectroscopic performances and the trade-off between speed and energy resolution.