DocumentCode
3525690
Title
Transcoder system with high processing efficiency to support simultaneous multirate output
Author
Nagayoshi, I. ; Wakui, M. ; Hanamura, T. ; Tominaga, H.
Author_Institution
Waseda Univ., Tokyo, Japan
fYear
2003
fDate
7-9 July 2003
Firstpage
250
Lastpage
253
Abstract
In this paper, we propose an efficient transcoder architecture to support a simultaneous multirate output. First, we discuss about some architectures to realize this feature. Next, we explain the proposed architecture, it shares not only VLD/IQ but also Q/VLC which have the same quantization step sizes each other. We analyze the numbers of Q/VLC times per one MB to investigate an effect of sharing, and evaluate its computation complexity. From the simulation, that complexity has an upper limit and it can support any numbers of bitstream by 3-6 times complexity than single output.
Keywords
computational complexity; discrete cosine transforms; transceivers; vector quantisation; complexity; high processing efficiency; quantization; simultaneous multirate output; transcoder system;
fLanguage
English
Publisher
iet
Conference_Titel
Visual Information Engineering, 2003. VIE 2003. International Conference on
ISSN
0537-9989
Print_ISBN
0-85296-757-8
Type
conf
DOI
10.1049/cp:20030534
Filename
1341340
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