Title :
Proposal for a readout driver card for the ATLAS Insertable B-Layer
Author :
Falchieri, D. ; Bruni, G. ; Bruschi, M. ; Antone, I.D. ; Dopke, J. ; Flick, T. ; Gabrielli, A. ; Grosse-Knetter, J. ; Joseph, J. ; Krieger, N. ; Kugel, A. ; Morettini, P. ; Polini, A. ; Rizzi, M. ; Schroer, N. ; Travaglini, R. ; Zannoli, S. ; Zoccoli, A.
Author_Institution :
INFN Bologna, Univ. of Bologna, Bologna, Italy
fDate :
Oct. 30 2010-Nov. 6 2010
Abstract :
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design and it will be installed by Phase I. New front-end readout ASICs fabrication (FE-I4) will replace the previous chips in this layer. The new system features higher readout speed - 160Mb/s per ASIC - and simplified control. The current data acquisition chains are composed of front-end and readout chips, Back-Of-Crate (BOCs) cards and ReadOut Driver cards (RODs). This paper presents a proposal for the new ROD board, which implements modern FPGAs and high-speed links with the detector and with the ATLAS TDAQ system.
Keywords :
application specific integrated circuits; data acquisition; field programmable gate arrays; readout electronics; semiconductor counters; ATLAS TDAQ system; ATLAS pixel detector; FPGA; ROD board; back-of-crate cards; data acquisition chains; front-end chip; front-end readout ASIC fabrication; insertable B-layer; readout chip; readout driver cards; readout speed; Bandwidth; Calibration; Detectors; Digital signal processing; Field programmable gate arrays; Histograms; Pixel;
Conference_Titel :
Nuclear Science Symposium Conference Record (NSS/MIC), 2010 IEEE
Conference_Location :
Knoxville, TN
Print_ISBN :
978-1-4244-9106-3
DOI :
10.1109/NSSMIC.2010.5873869
