DocumentCode :
3527739
Title :
SMT-based synthesis of TTEthernet schedules: A performance study
Author :
Pozo, Francisco ; Rodriguez-Navas, Guillermo ; Hansson, Hans ; Steiner, Wilfried
Author_Institution :
Sch. of Innovation, Design & Eng., Malardalen Univ., Västeras, Sweden
fYear :
2015
fDate :
8-10 June 2015
Firstpage :
1
Lastpage :
4
Abstract :
Time-triggered networks, like TTEthernet, require adoption of a predefined schedule to guarantee low communication latency and minimal jitter. The synthesis of such schedules is a problem known to be NP-complete. In the past, specialized solvers have been used for synthesizing time-triggered schedules, but more recently general-purpose tools like Satisfiability Modulo Theories (SMT) solvers have reported synthesis of large network schedules in reasonable time for industrial purposes. An interesting characteristic of any general-purpose tool is that its configuration parameters can be tuned in order to fit specific problems and achieve increased performance. This paper presents a study identifying and assessing which SMT solver parameters have the highest impact on the performance when synthesizing schedules for time-triggered networks. The results show that with appropriate values of certain parameters, the time can be reduced significantly, up to 75% in the best cases compared to previous work.
Keywords :
computability; computational complexity; local area networks; telecommunication scheduling; NP-complete problem; SMT solvers; SMT-based synthesis; TTEthernet schedules; satisfiability modulo theories solvers; time-triggered networks; time-triggered schedules; Context; High definition video; Real-time systems; Receivers; Schedules; Spread spectrum communication; Synthesizers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Embedded Systems (SIES), 2015 10th IEEE International Symposium on
Conference_Location :
Siegen
Type :
conf
DOI :
10.1109/SIES.2015.7185055
Filename :
7185055
Link To Document :
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