FPGA Implementation of Mac Based Stream Cipher-Phelix

Now a day´s many people are connected to the internet with large amount of confidential information such as mails, transactions, being transmitted every day. Privacy and the confidentiality of this information can be achieved by encryption algorithms. The consequence is the significant improvement of cryptanalysis techniques. Phelix is one of the high-speed stream encryption cipher technique with built-in single-pass functionality. In Phelix We use a 28-bit key, 27-bit nonce to create design strength of 128 bits. This paper simulates and implements the function of Phelix stream cipher, wrote the codes to implement full algorithm that includes encryption and decryption using Very high speed hardware description language (VHDL) and provided the simulation and implementation results using Active HDL Simulation tool and Xilinx implementation tool respectively. The simulation result shows that the designed IP core meets the required protocol specifications for the proper functioning of Phelix stream cipher.